This invention relates to content-addressable memories. More particularly, it is concerned with an array of memory cells and control circuitry for storing a set of keywords and for comparing the stored keywords to a search word of input data.
Content-addressable memories simultaneously compare a search word with a set of stored keywords. An indication of whether or not the search word matches the stored keywords is produced for each stored keyword. A distinguishing characteristic of a content-addressable memory (CAM) is that each stored keyword is uniquely identified on the basis of the content of the keyword itself, rather than by its address within the memory array as in conventional digital memories.
A content-addressable memory includes an array of memory cells arranged in a matrix of rows and columns. Each memory cell stores a single bit of digital information. The bits stored in a row of memory elements constitute a stored keyword. A search word of input data is simultaneously applied to all the rows during a match operation, and an indication is produced for each row as to whether or not the search word matches the keyword stored therein.
With conventional content-addressable memories charges present on the data input lines to the memory cells are used to compare each bit of the search word with the corresponding bit of the stored keyword. This approach depends on the ratio of the data input line capacitance to the cell storage node capacitance, and the ratio of the input driving current to the driving current within a memory cell. Thus, as the number of memory cells in the array are increased, comparison during a match operation becomes slower. A design based on these ratios also limits the operating speed even for small arrays, because the size of the drive transitors of a memory cell is limited by the need to overpower them during a write operation. In addition this approach also requires sensitive circuits on the data input lines in order to detect small voltage swings during the match operation.